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Professor Supervisor of Master's Candidates
Scientific Research
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Paper Publications
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- Dengquan Li,Jiaxin Liu,Haoyu Zhuang,Yintang Yang.A 7b 2.6mW 900MS/s nonbinary 2-then-3b/cycle SAR ADC with background offset calibration:IEEE Custom Integrated Circuits Conference (CICC),2019
- Dengquan Li,Ruixue Ding,Maliang Liu,Yintang Yang,Nan Sun.A 10-bit 600-MS/s time-interleaved SAR ADC with interpolation-based timing skew calibration:IEEE Transactions on Circuits and Systems II: Express Briefs,2019,66(1):16-20
- Dengquan Li,Yintang Yang.A background timing skew calibration technique in time-interleaved ADCs with second order compensation:IEEE Asia Pacific Conference on Circuits and Systems (APCCAS),2018:53-556
- Dengquan Li,Ruixue Ding,Yintang Yang.A 1.4-mW 10-bit 150-MS/s SAR ADC with nonbinary split capacitive DAC in 65 nm CMOS:IEEE Transactions on Circuits and Systems II: Express Briefs,2018,65(11):1524-1528
- Dengquan Li,Liang Zhang,Yintang Yang.A background fast convergence algorithm for timing skew in time-interleaved ADCs:Microelectronics Journal,2016,47(1):45-52
- Dengquan Li,Liang Zhang,Yintang Yang.An 8-bit 0.333-2 GS/s configurable time-interleaved SAR ADC in 65-nm CMOS:Journal of Circuits, Systems, and Computers,2015,24(6):1-14
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