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SRNoC: An Ultra-fast Configurable FPGA-based NoC Simulator Using Switch-Router Architecture

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Title of Paper:SRNoC: An Ultra-fast Configurable FPGA-based NoC Simulator Using Switch-Router Architecture

Journal:IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

All the Authors:Yi Liu,Yintang Yang

Indexed by:Journal paper

Correspondence Author:Changiqng Xu

Document Type:J

Volume:39

Issue:10

Page Number:2798-2811

Translation or Not:No

Date of Publication:2019-10-15

Included Journals:SCI

Date:2022-01-15

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